1. Field of the Invention
The present invention relates to a resist pattern forming method in a lithography technique and a semiconductor device manufacturing method using the same.
2. Description of the Related Art
In general, a technique for forming a pattern based on a circuit design is referred to as lithography technique in a semiconductor manufacturing process. Requirements of the lithography technique in the semiconductor manufacturing process include resolution (minimum line width which can be formed on a substrate), focal depth (range in which a clear image can be obtained in the back and front of the focal surface), alignment precision, etching resistance, throughput and low costs.
As well known, a short-wavelength light source is used, the NA (Numerical Aperture) of a projecting lens is increased or the like as a method for improving resolution. However, since the increase of the NA value reduces the focal depth, the NA value needs to be set such that a practical focal depth can be ensured.
The basic procedure of the lithography technique comprises the steps of coating a substrate with a resist (resist coating), exposing the resist in a pattern corresponding to a circuit design (exposure) and developing the exposed resist to form a resist pattern on the substrate (development). A conventional resist pattern forming method will be described below with reference to FIGS. 1A-1D.
FIGS. 1A-1D are sectional process drawings of a conventional resist pattern forming method (conventional example 1).
A resist pattern having a line width of 110 nm is formed by this conventional resist pattern forming method.
First, a substrate 1 is coated with a resist 2 having a film thickness of 500 nm (FIG. 1A). This is a positive resist.
Subsequently, the resist 2 is irradiated with KrF light 3 by a stepper (not shown; a kind of aligner) through a photomask 14 to expose a mask pattern (FIG. 1B). At this time, the optical conditions are a numerical aperture NA of 0.68 and a coherence factor "sgr" of 0.75. The wavelength of the KrF light is 248 nm. The exposure amount is 35.0 mJ/cm2. By this exposure, an acid generating agent is photodecomposed in an exposed portion of the resist 2, thereby generating an acid. As a photomask 14, a mask obtained by forming a metallic thin film 14a having an aperture pattern on a glass substrate 14b is used.
Subsequently, heat treatment is performed at 105xc2x0 C. for 90 seconds (FIG. 1C). By this heat treatment, a protective group in the exposed portion of the resist 2 is reacted by the acid catalyst elimination reaction, thereby increasing hydrophilicity of the exposed portion of the resist 2. As a result, a developer soluble portion 12a which can be dissolved by a developer is formed.
Then, development is performed by using a TMAH (Tetramethyl Ammonium Hydroxide) aqueous solution having a concentration of 2.38% at a liquid temperature of 23xc2x0 C. for a development time of 60 seconds (FIG. 1D). By this development, the developer soluble portion 12a is dissolved and removed and an unexposed portion remains. Thus, a resist pattern 12b having a line width of 110 nm is obtained.
Subsequently, when the above-described mask pattern is exposed with KrF light by using a lens having an NA of 0.68 and a of 0.75, an experiment shown in the above FIGS. 1A-1D is carried out as described above by moving a wafer stage of the aligner relatively to the lens to check the focal depth with which a developed resist pattern having a line width design dimension of 110 nmxc2x110% can be obtained.
As a result, a CD (critical dimension)-Focus curve shown in FIG. 2 is obtained. Two broken lines in parallel to the horizontal axis shown in FIG. 2 are lines each showing a line width of 110 nmxc2x110%. As shown in FIG. 2, in this optical system, a focal depth with which a line having a design dimension of 110 nm can be formed with an error of 10% is very shallow and substantially 0 xcexcm. The above optical system currently has the most advanced resolution in practice. However, the result of the above-described experiment showed that almost no focal depth could be obtained even though this system is used.
In the above conventional example 1, a case where a resist pattern is formed on a wafer having a planar surface across the whole is assumed. Normally, however, steps are present in some regions on the surface in an actual semiconductor device. Such an example will be described below.
FIGS. 3A-3D are sectional process drawings of another conventional resist pattern forming method (conventional example 2). A substrate 11 has a step of 0.2 xcexcm in FIGS. 3A-3D. During a semiconductor manufacturing process, steps of this size are spontaneously generated by a circuit pattern laminated on a semiconductor wafer. The method of conventional example 2 is employed on this substrate 11 under the same conditions as in the above conventional example 1. In conventional example 2 as well, a resist pattern having a line width of 110 nm is formed.
In conventional example 2, the substrate 11 is first coated with a resist 2 having a film thickness of 500 nm (FIG. 3A) as in the case of conventional example 1.
Subsequently, the resist 2 is irradiated with KrF light 3 by a stepper (not shown) through a photomask 14 to expose a mask pattern (FIG. 3B). At this time, the focus is adjusted to the upper level portion A of the step. Therefore, since the focal depth is even less than 0.1 xcexcm as described above, a pattern having designed dimensions can not be obtained on the lower level portion B of the step.
Subsequently, heat treatment is performed at a temperature of 105xc2x0 C. for 90 seconds (FIG. 3C).
Then, development is performed by using a TMAH aqueous solution having a concentration of 2.38% at a liquid temperature of 23xc2x0 C. for a development time of 60 seconds (FIG. 3D). By this development, a developer soluble portion 12a is dissolved and removed and an unexposed portion remains. Thus, a resist pattern 12b having a line width of 110 nm is obtained on the upper level portion A of the step. On the other hand, since the lower level portion B is not within the focal depth in the exposure, the pattern precision is degraded. After the developer soluble portion 12c is dissolved and removed, a resist pattern having a line width of 110 nm cannot be obtained. A resist pattern 12d having a deformed pattern remains.
As described above, in conventional resist pattern forming methods, when a resist pattern having the same line width as the resolution of the aligner is to be formed, a sufficiently practical focal depth cannot be obtained, thereby resulting in difficulty to form a resist pattern having a desired line width. Therefore, these methods are not practical.
Accordingly, an object of the present invention is to provide a resist pattern forming method by which a resist pattern having a finer line width can be formed in high precision with a sufficiently practical focal depth than a line width with which a sufficient focal depth can be conventionally obtained so that contradicting problems between the resolution and the focal depth are solved.
A resist pattern forming method according to a first aspect of the present invention has the steps of forming a resist pattern having a line width greater than a desired line width by exposure and development, and reducing the line width by exposing the whole surface of said resist pattern and developing the resist pattern.
According to the resist pattern forming method of this aspect of the present invention, a resist pattern having a line width greater than a desired line width has only to be exposed in a process of exposing a resist pattern. Therefore, practical resolution can be ensured even with a finer line width than a line width with which a sufficient focal depth can be obtained.
That is, an advantage is that a desired resist pattern finer than a line width with which a sufficient focal depth can be obtained can be formed in high precision on not only a planar substrate, but also a substrate with some irregularities.
It is noted that a positive resist is used in the present invention. Exposure of the whole surface herein indicates that an optical path from a light source to a resist is not blocked with a mask or the like so that the whole surface of the resist is exposed.
A resist pattern forming method according to a second aspect of the present invention has the steps of forming a resist pattern having a line width greater than a desired line width by exposure and development, and reducing the line width of said resist pattern by exposing the whole surface of the resist pattern with an exposure amount equal to the amount for penetrating through the resist pattern or less and developing.
According to the resist pattern forming method of this aspect, the same advantage as that of the resist pattern forming method of the first aspect of the invention can be obtained. In addition, since the whole surface of a resist pattern having a line width greater than a desired line width is exposed with an exposure amount equal to the amount for penetrating through the resist pattern or less, the whole resist pattern is not dissolved by the subsequent development. Therefore, too much reduction to a line width finer than a desired line width can be prevented and a resist pattern having a desired line width can be easily and reliably formed. However, it is preferable that optimal values of the exposure amount for exposure of the whole surface and the development time thereafter are obtained by an experiment or the like and set in advance to obtain an appropriate amount of reduction to form a resist pattern having a desired line width.
A resist pattern forming method according to a third aspect of the present invention has the steps of forming a resist pattern having a line width greater than a desired line width by exposure and development, and reducing the line width by exposing the whole surface thereof and developing the resist pattern for a development time shorter than the development time in the aforementioned development.
According to the resist pattern forming method of this aspect, the same advantage as in the resist pattern forming method of the first aspect of the invention can be obtained. In addition, since a resist pattern having a line width greater than a desired line width is developed for a develop time shorter than the development time in the development for forming the resist pattern having a line width greater than a desired line width, a resist pattern having a desired line width can be formed by reducing the resist pattern. However, it is preferable that optimal values of the exposure amount for exposure of the whole surface and the development time thereafter are obtained by an experiment or the like and set in advance to obtain an appropriate amount of reduction to form a resist pattern having a desired line width.
A semiconductor device manufacturing method according to a fourth aspect of the present invention for forming a pattern having a desired width on a semiconductor wafer has the steps of coating the whole surface thereof with a resist, thereafter performing exposure with a mask pattern having a width greater than the desired width, thereafter developing the resist to form a first pattern, thereafter exposing the whole surface of the first pattern and performing development to form a second pattern having the desired width and processing material under the coating by using the second pattern.
A semiconductor device manufacturing method according to a fifth aspect of the present invention is characterized in that the semiconductor wafer has a step and the width of the mask pattern is a width with which a sufficient focal depth can be obtained to form the first pattern irrespective of the position of the exposure on the semiconductor wafer in the semiconductor device manufacturing method of the fourth aspect of the invention.
A semiconductor device manufacturing method according to a sixth aspect of the present invention is characterized in that the exposure amount for the exposure of the whole surface is an exposure amount equal to the amount for penetrating through a film of the first pattern or less in the semiconductor device manufacturing method of the fourth or fifth aspect of the invention.
A resist pattern forming method according to a seventh of the present invention comprises the steps of:
coating a substrate with a positive resist;
conducting a first exposure of a pattern to the resist with an exposure amount equal to the amount for penetrating through the resist pattern or more;
conducting a first heat treatment for making an exposed portion of the resist soluble;
conducting a first development for dissolving and removing the soluble portion of the resist to form a resist pattern;
conducting a second exposure for exposing the whole surface of the resist pattern with an exposure amount equal to the amount for penetrating through the resist pattern or less;
conducting a second heat treatment for making the exposed portion of the resist pattern soluble; and
conducting a second development for dissolving and removing the soluble portion of the resist pattern.
According to the resist pattern forming method of this aspect of the invention, first, a resist pattern is formed by the resist coating process, first exposure process, first heat treatment process, and first development process for forming a resist pattern. Then, in the second exposure process, the whole surface of the resist pattern is exposed with an exposure amount equal to the amount for penetrating through the resist pattern or less. Therefore, the whole resist pattern is not dissolved by the subsequent second development process. In the second development process, the portion of the resist pattern made soluble is dissolved and removed. Thus, the line width of the resist pattern can be reduced.
Therefore, a fine desired resist pattern having a line width equal to resolution of an aligner or smaller can be formed in high precision by setting processing conditions such that the reduced resist pattern has a desired line width corresponding to a circuit design and utilizing the resist pattern forming method of the seventh aspect of the invention.